Virtual Simulation¶
PiPLC includes a complete virtual I/O simulation environment for testing programs without physical hardware.
Simulation Panel¶
In simulation mode, the SimulationPanel provides:
- Toggle inputs: Click to activate/deactivate inputs
- Force bits: Manual override of any I/O/B address
- Memory monitor: View values in real time
- Watch panel: Add specific variables for monitoring
Starting a Simulation¶
- Press ++f5++ to start simulation
- Use the simulation panel to toggle inputs
- Press ++f6++ to pause, ++f7++ to stop
Forcing I/O¶
To force a value during simulation:
- Right-click on a contact or coil
- Select Force ON, Force OFF, or Unforce
- Forced bits override the normal scan cycle
- A force bitmap tracks all forced addresses
Force semantics (IEC 61131-3 / CODESYS style)¶
PiPLC follows the IEC 61131-3 / CODESYS model rather than the Allen-Bradley split:
- Forcing overrides the variable, not just the physical I/O. Every reader — contacts, the engine, the UI, HMI — sees the forced value uniformly.
- While a bit is forced, writes by ladder logic are silently suppressed for that address. An OTE driving
O:0/2cannot change the bit while it is forced; the rung still evaluates and the visual still reflects power flow through the rung, but the underlying bit stays at the forced value. - Unforcing removes the override. The next normal write (an OTE on a true rung, an input scan, MOV, HMI, etc.) overwrites the bit as usual.
Sub-element addresses (timer/counter bits like T:5.DN) are not force-addressable — only direct bit addresses in the I:, O:, and B: regions can be forced.
Force indicator badge¶
Any contact or coil whose underlying bit is currently forced shows a small colored F badge to the left of the address text:
- Green badge — the bit is forced to 1 (ON)
- Black badge (default) — the bit is forced to 0 (OFF)
The badge colors are configurable in Preferences → Colors → Force Indicator. The badge appears on every visual instance of the forced address — XIC, XIO, OTE, OTL, OTU — so you can spot at a glance which signals you currently have under manual override.
Coil visual state vs. rung power¶
A subtle but important detail: the lit / unlit state of a coil (OTE/OTL/OTU) reflects the underlying bit value, not the rung's power flow. This matters in three common cases:
- An OTL that latched on an earlier scan stays lit even when the rung that latched it goes false — because the bit itself is still
1. - A forced coil shows the forced value regardless of whether the rung is feeding power to it.
- A coil whose address is written by HMI / Modbus / SCRIPT shows whatever external clients wrote, not what the rung last computed.
The wire passing through the coil still tracks rung continuity in the usual way; only the coil glyph itself reflects the bit.
Editing is disabled during simulation
While the simulation is running:
- Ladder editing is disabled
- Drag & drop is not allowed
- Delete/Backspace won't remove elements
- Right-click shows monitoring/forcing menu instead